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Advanced ASIC Chip Synthesis
Himanshu Bhatnagar
€ 271.85
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Description for Advanced ASIC Chip Synthesis
Paperback. Num Pages: 354 pages, biography. BIC Classification: THR; TJFC; UGC. Category: (P) Professional & Vocational. Dimension: 235 x 155 x 19. Weight in Grams: 551.
Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler® Physical Compiler® and PrimeTime®, Second Edition describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the entire ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is covered in detail.
The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for ... Read more
Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler® Physical Compiler® and PrimeTime®, Second Edition describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the entire ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is covered in detail.
The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for ... Read more
Product Details
Format
Paperback
Publication date
2013
Publisher
Springer-Verlag New York Inc. United States
Number of pages
354
Condition
New
Number of Pages
328
Place of Publication
New York, NY, United States
ISBN
9781475776294
SKU
V9781475776294
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
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