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Description for Latchup
Hardcover. This book addresses what is needed in future applications in order to avoid latchup in advanced technologies. A significant amount of new latchup issues and materials from the last twenty years are presented, such as the development of external and transient latchup concepts, and new tools such as the PICA tool. Num Pages: 474 pages, Illustrations. BIC Classification: TJFD5. Category: (P) Professional & Vocational. Dimension: 245 x 176 x 32. Weight in Grams: 932.
Interest in latchup is being renewed with the evolution of complimentary metal-oxide semiconductor (CMOS) technology, metal-oxide-semiconductor field-effect transistor (MOSFET) scaling, and high-level system-on-chip (SOC) integration.
Read moreClear methodologies that grant protection from latchup, with insight into the physics, technology and circuit issues involved, are in increasing demand.
This book describes CMOS and BiCMOS semiconductor technology and their sensitivity...
Product Details
Format
Hardback
Publication date
2007
Publisher
John Wiley & Sons Inc United Kingdom
Number of pages
474
Condition
New
Number of Pages
472
Place of Publication
New York, United States
ISBN
9780470016428
SKU
V9780470016428
Shipping Time
Usually ships in 7 to 11 working days
Ref
99-50
About Steven H. Voldman
Steven H. Voldman is an IEEE Fellow for 'Contributions in ESD Protection in CMOS, Silicon on Insulator and Silicon Germanium Technology'. He has a B.S. engineering science from University of Buffalo (1979), a first M.S. EE (1981) from Massachusetts Institute of Technology (MIT), a second EE degree (engineering degree) from MIT,a M.S. in engineering physics (1986) and a Ph.D. EE...
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